The Probe Mode Control
Register
The Pentium processor is equipped with a super-debugging mode,
called probe mode. When in probe mode, the Pentium processor
ceases to execute any x86 instructions, and all bus activity
stops. Probe mode is used by In-Circuit-Emulators to interface
with the Pentium, much as ICE-mode was used by previous
generations of Intel x86 processors. Probe mode is superior to
previous generations of Intel x86 processors which had a
dedicated ICE-mode. ICE-mode on previous x86 processors was
really System Management Mode (but Intel never told you that). By
implication, ICE-mode was executing code on behalf of the ICE
host computer. This is one of the drawback to ICE mode which
makes probe mode superior. In probe mode, no x86 instructions are
executing, and the only bus activity which is performed, is at
the direction of the probe mode ICE.
Probe mode implements a control register called the Probe Mode
Control Register (PMCR). The PMCR is instrumental for enabling
the undocumented ICEBP instruction (see the ICEBP instruction
description for details on how to use this instruction to your
advantage). Other bits in this register enable and disable the
performance monitoring/breakpoint pins. The only other known bit
in this register is a read-only bit indicating that the
microprocessor has entered System Management Mode (SMM).
Back to Probe Mode
article.
Back to Pentium
Model-Specific Registers article by Ralf Brown.
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