By Robert R. Collins

August 1998	The Segment Descriptor Cache	The segment descriptor cache is the heart of memory management, and the key to unlocking real mode. In this article, I discuss the contents and usage of this undocumented entity which is the key to unreal mode and more efficient debugging.
May 1998	The Pentium F00F Bug	When x86 processors encounter an invalid instruction, the processor is supposed to generate an invalid opcode exception. If this mechanism fails, however, the program can bring the system down -- and that's what happens with the F00F bug.
May 1998	VME: Coming Out of the Cold	In this article, Robert finishes his discussion of Virtual Mode Extensions. Robert demonstrates that Intel left enough information to aid in reverse-engineering, in spite of attempting to remove vital engineering details of VME. Many of the known Caveats of VME are discussed. Finally, the VME-related instruction algorithms are disclosed for the first time in a public document.
March 1998	Benchmarks: Fact Fiction or Fantasy?	Can you really trust published benchmarks? By making a 166-MHz Pentium computer seem to outperform a 300-MHz Pentium II system, Robert shows why healthy skepticism is a useful trait. Brian Butler then presents a sample database benchmark. Additional resources include BENCHMK.ZIP (source code).
March 1998	Details and Caveats of Intel's Virtual Mode Extensions (VME)	In this article, Robert continues his discussion of VME by uncovering the inner workings of Intel's Virtual Mode Extensions.
January 1998	The Pentium's Enhanced v86 Mode	In this article, Robert starts his three-part discussion of Intel's Enhancements to v86 mode. Robert begins his discussion with a behind-the-scenes look at the first Ev86 article disclosure in November, 1995. Following the spy thriller, Robert begins his discussion of v86 mode enhancements on the Pentium Processor.
November 1997	ICE Mode and the Pentium Processor - and - The Creation of Appendix H	Robert Continues his examination of in-circuit emulation and the Pentium by looking at the Pentium's ICE Mode.
September 1997	In-Circuit Emulation: How the Microprocessor Evolved Over Time	In this article, Robert continues his discussion of In-Circuit Emulation by discussing the changes taking place inside of the microprocessor.
August 1997	Inside the Pentium II Math Bug - and - A behind-the-scenes Chronology of the Dan-0411 Bug	Two days before Intel's biggest processor announcement in years, a math bug in the Pentium Pro and Pentium II came to light. Robert takes you inside the Dan-0411 "flag erratum," and tells how the story unfolded.
July 1997	In-Circuit Emulation A powerful hardware tool for software debugging	Robert discusses the basics of in-circuit emulation, describing how it has become his primary software debugging tool.
May 1997	The Caveats of System Management Mode	In this issue, Robert discusses the many caveats of SMM, and gives pointers to make your SMM development easier. Later in the article, Robert demonstrates how it's possible to violate the priviledge level mechanism of the Pentium Processor by modifying values in the SMM State Save Map.
March 1997	The Secrets of System Management Mode	In this issue, Robert discusses the secrets of the state save map, the AutoHALT feature, and I/O Restart features of Intel's System Management Mode.
January 1997	Intel's System Management Mode	Robert launches an examination of the Intel System Management Mode (SMM), comparing the SMM's RSM instruction to the ICE mode's undocumented LOADALL instruction.
November 1996	CPUID Algorithm Wars -- Part II	Robert presents a processor-detection algorithm that can obtain processor stepping information on processors thatdon't support the CPUID instruction.
September 1996	Detecting Intel Processors: Knowing the generation of a system CPU	How does your program know which Intel processor is the current system CPU? Robert looks at the options, including Intel's PUSHF/POPF technique.
July 1996	Paging Extensions for the Pentium Pro Processor	The Pentium Pro's Physical Address Extensions (PAE) let the processor address up to 64 GB of physical memory (36-bit address bus), and access page sizes of 2 MB.
May 1996	Understanding Pentium's 4 MB Page Size Extensions	Four-MB paging lets the operating system access very large data structures. However, receiving documentation for this feature required signing a hefty NDA. Did you know that this feature was documented all along, if you knew where to look, and no NDA required.