Microprocessor
Headline News

Top Stories for February 21, 2000 (details below)
C/Net	Bugs found in servers, workstations using Intel chipset
PC Week Online	Intel confirms problem with chip sets
Semiconductor Business News	Intel stumbles on use of Rambus chip sets to support SDRAM
Electronic Buyers' News	Low-cost Timna processor to swap Rambus interface for SDRAM
EE Times	Intel shows CPU strategies to dominate Internet computing
Electronic Buyers' News	Intel aims to pull Ethernet functions into PC-processor platform
C/Net	Via fires back at Intel, readies new chip
EE Times	Intel will strictly control 400-MHz bus
Electronic Buyers' News	Willamette architecture could trigger debate over bus licenses
The Register Files
The Register	Intel to play speed ketchup 27 February

Microprocessor Headline News

Collected By Robert R. Collins

Week of February 20, 2000

Older News

February 21, 2000
Bugs found in servers, workstations using Intel chipset By Michael Kanellos February 18, 2000 C/Net	Intel executives can be forgiven for wondering, what next? The Santa Clara, Calif., chipmaking giant has discovered a bug that affects some server and workstation computers incorporating recently released Intel chipsets, just when it seemed like the company was digging out from a series of manufacturing snafus in 1999. Though the glitch occurs somewhat rarely, three circuit board ("motherboard") designs have been canceled in response.
Intel confirms problem with chip sets By Ken Popovich February 17, 2000 PC Week Online	Intel Corp. has disclosed a problem involving its 820 and 840 chip sets that has spurred the company to scrap plans for three motherboards it had on its server road map. But while an Intel representative stressed that the problem would likely affect only a few users, some analysts said the trouble may indicate a flaw in a crucial component used to configure the boards with SDRAM.
Intel stumbles on use of Rambus chip sets to support SDRAM By Jack Robertson February 18, 2000 Semiconductor Business News	Intel Corp. here has stubbed its toe on trying to use Direct Rambus 820 Camino or 840 Carmel chip sets to support less costly SDRAM instead. A spokesman late today confirmed that the 820 Camino using a so-called Memory Translator Hub (MTH) conversion chip and the 840 Carmel using a similar Memory Repeater Hub (MRH) encountered random data errors when operating in the error correction code (ECC) mode. He said no error trouble was incurred when the 820 or 840 supported only Direct Rambus memory or weren't operating with ECC with either Rambus or SDRAM.
Low-cost Timna processor to swap Rambus interface for SDRAM By Jack Robertson February 20, 2000 Electronic Buyers' News	Intel Corp. last week confirmed it is using SDRAM to support its upcoming low-cost Timna processor, deferring the use of Direct Rambus DRAM until cost and availability issues are addressed. The highly integrated Timna is slated for the sub-$500 PC market and should ship in PCs at midyear for the back-to-school and holiday sales seasons. Pete MacWilliams, an Intel fellow and director of platform achitecture for the company, said “a derivative of Timna” will be introduced next year under a different brand name. The new chip will support Direct RDRAM, at which point Intel believes the technology will be more widely available and at a lower price.
Intel shows CPU strategies to dominate Internet computing By Alexander Wolfe February 18, 2000 EE Times	Can Intel Corp. drop its competitors with a one-two punch on the client and server fronts? That was the central technology and business question that hung in the air after this week's Intel Developer Forum (IDF), where the company indicated it is determined to tough out what may be the most complex architectural strategies the industry has ever seen in both its 32-bit and 64-bit microprocessor road maps. On the 32-bit front, Intel will take deep pipelining to new extremes in its next-generation Willamette processor. Details of the completely overhauled microarchitecture include a better branch-prediction algorithm and new instructions to handle double-precision floating-point calculations. Equally important, Willamette will connect to the outside world via a 3.2-Gbyte/second system interface.
Intel aims to pull Ethernet functions into PC-processor platform By Mark LaPedus and Mark Hachman February 20, 2000 Electronic Buyers' News	Aspiring to extend its dominance of PC architecture to the networking arena, Intel Corp. plans to integrate some major networking functions onto its PC chipsets in the near future. The move could diminish the need for stand-alone LAN chips and systems and pose a threat to several suppliers, industry analysts said. Intel would not go as far as to say that it wants to kill the LAN-chip and -equipment business. After all, it sold more than $1 billion worth of LAN-based systems and chips last year, analysts said.
Via fires back at Intel, readies new chip By Michael Kanellos February 18, 2000 C/Net	Via Technologies fired back at Intel in one of the many lawsuits between the two companies as the Taiwanese chipset maker prepares the release of its first microprocessor. Via this week said it disputes Intel's claim that it has violated the chip giant's intellectual property and said that it plans to contest the suit. The challenge was filed in a London court. "We are going to vigorously fight the court actions that Intel has brought against Via," said Richard Brown, director of marketing for the company. "We strongly believe that the patent infringement claims they have made against us are totally without merit."
Intel will strictly control 400-MHz bus By Will Wade and Rick Merritt February 18, 2000 EE Times	Willamette, the 32-bit Pentium processor announced by Intel Corp. at this week's Intel Developer Forum, sports a processor bus that raises a new batch of intellectual property issues for engineers looking to build core logic for Intel's CPUs. Willamette uses a 400-MHz front-side bus that seems in some significant respects to be a fresh design over the existing P6 bus of the Pentium III line. Intel said it will exercise control over the use of the Willamette processor bus, and a company with rights to the current P6 bus will not have rights to build chips for Willamette, said Paul Otellini, general manager of the architecture business group of Intel.
Willamette architecture could trigger debate over bus licenses By Mark Hachman February 20, 2000 Electronic Buyers' News	Now that Intel Corp. has formally disclosed details of the Willamette microprocessor, which chipset makers can develop products using its bus? The question is far from academic. Even though Intel has yet to formally roll out the Willamette and the supporting Tehama chipset, chip makers are already scrambling to determine their rights to the platform's associated bus technology.
The Register Files
Intel to play speed ketchup 27 February By Mike Magee February 20, 2000 The Register	As we revealed some weeks ago, after we published an internal Intel memo to its distributors and channels, there is a price adjustment to its Pentium III Coppermine processors on the 27th of February next. We have already published details of AMD's price adjustments on that date. According to our information, Intel will play the catch-up game with suddenly virile AMD by introducing 850MHz and 866MHz of Coppermines on the 27th. How many of these processors will be available then is a different matter.

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